564 lines
13 KiB
C
564 lines
13 KiB
C
/*
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* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* CMSIS-Core(A) Compiler Specific Macros, Functions, Instructions
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*/
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#ifndef __CMSIS_CP15_H
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#define __CMSIS_CP15_H
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#if defined ( __ICCARM__ )
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#pragma system_include /* treat file as system include file for MISRA check */
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#elif defined (__clang__)
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#pragma clang system_header /* treat file as system include file */
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#endif
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/** \brief Get ACTLR
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\return Auxiliary Control register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_ACTLR(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 1, 0, 1);
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return(result);
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}
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/** \brief Set ACTLR
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\param [in] actlr Auxiliary Control value to set
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*/
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__STATIC_FORCEINLINE void __set_ACTLR(uint32_t actlr)
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{
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__set_CP(15, 0, actlr, 1, 0, 1);
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}
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/** \brief Get CPACR
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\return Coprocessor Access Control register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_CPACR(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 1, 0, 2);
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return result;
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}
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/** \brief Set CPACR
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\param [in] cpacr Coprocessor Access Control value to set
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*/
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__STATIC_FORCEINLINE void __set_CPACR(uint32_t cpacr)
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{
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__set_CP(15, 0, cpacr, 1, 0, 2);
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}
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/** \brief Get DFSR
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\return Data Fault Status Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_DFSR(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 5, 0, 0);
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return result;
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}
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/** \brief Set DFSR
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\param [in] dfsr Data Fault Status value to set
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*/
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__STATIC_FORCEINLINE void __set_DFSR(uint32_t dfsr)
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{
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__set_CP(15, 0, dfsr, 5, 0, 0);
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}
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/** \brief Get IFSR
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\return Instruction Fault Status Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_IFSR(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 5, 0, 1);
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return result;
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}
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/** \brief Set IFSR
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\param [in] ifsr Instruction Fault Status value to set
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*/
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__STATIC_FORCEINLINE void __set_IFSR(uint32_t ifsr)
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{
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__set_CP(15, 0, ifsr, 5, 0, 1);
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}
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/** \brief Get ISR
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\return Interrupt Status Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_ISR(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 12, 1, 0);
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return result;
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}
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/** \brief Get CBAR
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\return Configuration Base Address register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_CBAR(void)
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{
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uint32_t result;
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__get_CP(15, 4, result, 15, 0, 0);
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return result;
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}
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/** \brief Get TTBR0
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This function returns the value of the Translation Table Base Register 0.
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\return Translation Table Base Register 0 value
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*/
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__STATIC_FORCEINLINE uint32_t __get_TTBR0(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 2, 0, 0);
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return result;
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}
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/** \brief Set TTBR0
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This function assigns the given value to the Translation Table Base Register 0.
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\param [in] ttbr0 Translation Table Base Register 0 value to set
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*/
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__STATIC_FORCEINLINE void __set_TTBR0(uint32_t ttbr0)
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{
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__set_CP(15, 0, ttbr0, 2, 0, 0);
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}
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/** \brief Get DACR
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This function returns the value of the Domain Access Control Register.
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\return Domain Access Control Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_DACR(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 3, 0, 0);
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return result;
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}
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/** \brief Set DACR
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This function assigns the given value to the Domain Access Control Register.
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\param [in] dacr Domain Access Control Register value to set
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*/
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__STATIC_FORCEINLINE void __set_DACR(uint32_t dacr)
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{
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__set_CP(15, 0, dacr, 3, 0, 0);
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}
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/** \brief Set SCTLR
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This function assigns the given value to the System Control Register.
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\param [in] sctlr System Control Register value to set
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*/
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__STATIC_FORCEINLINE void __set_SCTLR(uint32_t sctlr)
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{
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__set_CP(15, 0, sctlr, 1, 0, 0);
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}
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/** \brief Get SCTLR
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\return System Control Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_SCTLR(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 1, 0, 0);
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return result;
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}
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/** \brief Get MPIDR
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This function returns the value of the Multiprocessor Affinity Register.
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\return Multiprocessor Affinity Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_MPIDR(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 0, 0, 5);
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return result;
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}
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/** \brief Get VBAR
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This function returns the value of the Vector Base Address Register.
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\return Vector Base Address Register
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*/
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__STATIC_FORCEINLINE uint32_t __get_VBAR(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 12, 0, 0);
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return result;
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}
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/** \brief Set VBAR
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This function assigns the given value to the Vector Base Address Register.
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\param [in] vbar Vector Base Address Register value to set
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*/
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__STATIC_FORCEINLINE void __set_VBAR(uint32_t vbar)
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{
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__set_CP(15, 0, vbar, 12, 0, 0);
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}
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/** \brief Get MVBAR
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This function returns the value of the Monitor Vector Base Address Register.
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\return Monitor Vector Base Address Register
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*/
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__STATIC_FORCEINLINE uint32_t __get_MVBAR(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 12, 0, 1);
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return result;
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}
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/** \brief Set MVBAR
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This function assigns the given value to the Monitor Vector Base Address Register.
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\param [in] mvbar Monitor Vector Base Address Register value to set
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*/
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__STATIC_FORCEINLINE void __set_MVBAR(uint32_t mvbar)
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{
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__set_CP(15, 0, mvbar, 12, 0, 1);
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}
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#if (defined(__TIM_PRESENT) && (__TIM_PRESENT == 1U)) || \
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defined(DOXYGEN)
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/** \brief Set CNTFRQ
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This function assigns the given value to PL1 Physical Timer Counter Frequency Register (CNTFRQ).
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\param [in] value CNTFRQ Register value to set
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*/
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__STATIC_FORCEINLINE void __set_CNTFRQ(uint32_t value)
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{
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__set_CP(15, 0, value, 14, 0, 0);
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}
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/** \brief Get CNTFRQ
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This function returns the value of the PL1 Physical Timer Counter Frequency Register (CNTFRQ).
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\return CNTFRQ Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_CNTFRQ(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 14, 0 , 0);
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return result;
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}
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/** \brief Set CNTP_TVAL
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This function assigns the given value to PL1 Physical Timer Value Register (CNTP_TVAL).
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\param [in] value CNTP_TVAL Register value to set
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*/
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__STATIC_FORCEINLINE void __set_CNTP_TVAL(uint32_t value)
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{
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__set_CP(15, 0, value, 14, 2, 0);
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}
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/** \brief Get CNTP_TVAL
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This function returns the value of the PL1 Physical Timer Value Register (CNTP_TVAL).
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\return CNTP_TVAL Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_CNTP_TVAL(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 14, 2, 0);
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return result;
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}
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/** \brief Get CNTPCT
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This function returns the value of the 64 bits PL1 Physical Count Register (CNTPCT).
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\return CNTPCT Register value
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*/
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__STATIC_FORCEINLINE uint64_t __get_CNTPCT(void)
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{
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uint64_t result;
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__get_CP64(15, 0, result, 14);
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return result;
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}
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/** \brief Set CNTP_CVAL
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This function assigns the given value to 64bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).
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\param [in] value CNTP_CVAL Register value to set
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*/
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__STATIC_FORCEINLINE void __set_CNTP_CVAL(uint64_t value)
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{
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__set_CP64(15, 2, value, 14);
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}
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/** \brief Get CNTP_CVAL
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This function returns the value of the 64 bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).
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\return CNTP_CVAL Register value
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*/
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__STATIC_FORCEINLINE uint64_t __get_CNTP_CVAL(void)
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{
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uint64_t result;
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__get_CP64(15, 2, result, 14);
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return result;
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}
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/** \brief Set CNTP_CTL
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This function assigns the given value to PL1 Physical Timer Control Register (CNTP_CTL).
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\param [in] value CNTP_CTL Register value to set
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*/
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__STATIC_FORCEINLINE void __set_CNTP_CTL(uint32_t value)
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{
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__set_CP(15, 0, value, 14, 2, 1);
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}
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/** \brief Get CNTP_CTL register
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\return CNTP_CTL Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_CNTP_CTL(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 14, 2, 1);
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return result;
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}
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/******************************* VIRTUAL TIMER *******************************/
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/** see [ARM DDI 0406C.d] :
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. §B4.1.31 "CNTV_CTL, Counter-timer Virtual Timer Control register"
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. §B4.1.32 "CNTV_CVAL, Counter-timer Virtual Timer CompareValue register"
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. §B4.1.33 "CNTV_TVAL, Counter-timer Virtual Timer TimerValue register"
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. §B4.1.34 "CNTVCT, Counter-timer Virtual Count register"
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**/
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/** \brief Set CNTV_TVAL
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This function assigns the given value to VL1 Virtual Timer Value Register (CNTV_TVAL).
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\param [in] value CNTV_TVAL Register value to set
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*/
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__STATIC_FORCEINLINE void __set_CNTV_TVAL(uint32_t value)
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{
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__set_CP(15, 0, value, 14, 3, 0);
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}
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/** \brief Get CNTV_TVAL
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This function returns the value of the VL1 Virtual Timer Value Register (CNTV_TVAL).
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\return CNTV_TVAL Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_CNTV_TVAL(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 14, 3, 0);
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return result;
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}
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/** \brief Get CNTVCT
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This function returns the value of the 64 bits VL1 Virtual Count Register (CNTVCT).
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\return CNTVCT Register value
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*/
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__STATIC_FORCEINLINE uint64_t __get_CNTVCT(void)
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{
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uint64_t result;
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__get_CP64(15, 1, result, 14);
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return result;
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}
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/** \brief Set CNTV_CVAL
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This function assigns the given value to 64bits VL1 Virtual Timer CompareValue Register (CNTV_CVAL).
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\param [in] value CNTV_CVAL Register value to set
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*/
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__STATIC_FORCEINLINE void __set_CNTV_CVAL(uint64_t value)
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{
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__set_CP64(15, 3, value, 14);
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}
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/** \brief Get CNTV_CVAL
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This function returns the value of the 64 bits VL1 Virtual Timer CompareValue Register (CNTV_CVAL).
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\return CNTV_CVAL Register value
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*/
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__STATIC_FORCEINLINE uint64_t __get_CNTV_CVAL(void)
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{
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uint64_t result;
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__get_CP64(15, 3, result, 14);
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return result;
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}
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/** \brief Set CNTV_CTL
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This function assigns the given value to VL1 Virtual Timer Control Register (CNTV_CTL).
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\param [in] value CNTV_CTL Register value to set
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*/
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__STATIC_FORCEINLINE void __set_CNTV_CTL(uint32_t value)
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{
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__set_CP(15, 0, value, 14, 3, 1);
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}
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/** \brief Get CNTV_CTL register
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\return CNTV_CTL Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_CNTV_CTL(void)
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{
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uint32_t result;
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__get_CP(15, 0, result, 14, 3, 1);
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return result;
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}
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/***************************** VIRTUAL TIMER END *****************************/
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#endif
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/** \brief Set TLBIALL
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TLB Invalidate All
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*/
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__STATIC_FORCEINLINE void __set_TLBIALL(uint32_t value)
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{
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__set_CP(15, 0, value, 8, 7, 0);
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}
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/** \brief Set BPIALL.
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Branch Predictor Invalidate All
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*/
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__STATIC_FORCEINLINE void __set_BPIALL(uint32_t value)
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{
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__set_CP(15, 0, value, 7, 5, 6);
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}
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/** \brief Set ICIALLU
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Instruction Cache Invalidate All
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*/
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__STATIC_FORCEINLINE void __set_ICIALLU(uint32_t value)
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{
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__set_CP(15, 0, value, 7, 5, 0);
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}
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/** \brief Set ICIMVAC
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Instruction Cache Invalidate
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*/
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__STATIC_FORCEINLINE void __set_ICIMVAC(uint32_t value)
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{
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__set_CP(15, 0, value, 7, 5, 1);
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}
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/** \brief Set DCCMVAC
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Data cache clean
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*/
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__STATIC_FORCEINLINE void __set_DCCMVAC(uint32_t value)
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{
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__set_CP(15, 0, value, 7, 10, 1);
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}
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/** \brief Set DCIMVAC
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Data cache invalidate
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*/
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__STATIC_FORCEINLINE void __set_DCIMVAC(uint32_t value)
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{
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__set_CP(15, 0, value, 7, 6, 1);
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}
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/** \brief Set DCCIMVAC
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Data cache clean and invalidate
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*/
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__STATIC_FORCEINLINE void __set_DCCIMVAC(uint32_t value)
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{
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__set_CP(15, 0, value, 7, 14, 1);
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}
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/** \brief Set CSSELR
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*/
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__STATIC_FORCEINLINE void __set_CSSELR(uint32_t value)
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{
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__set_CP(15, 2, value, 0, 0, 0);
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}
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/** \brief Get CSSELR
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\return CSSELR Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_CSSELR(void)
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{
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uint32_t result;
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__get_CP(15, 2, result, 0, 0, 0);
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return result;
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}
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/** \brief Get CCSIDR
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\return CCSIDR Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_CCSIDR(void)
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{
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uint32_t result;
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__get_CP(15, 1, result, 0, 0, 0);
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return result;
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}
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/** \brief Get CLIDR
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\return CLIDR Register value
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*/
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__STATIC_FORCEINLINE uint32_t __get_CLIDR(void)
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{
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uint32_t result;
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__get_CP(15, 1, result, 0, 0, 1);
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return result;
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}
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/** \brief Set DCISW
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*/
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__STATIC_FORCEINLINE void __set_DCISW(uint32_t value)
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{
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__set_CP(15, 0, value, 7, 6, 2);
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}
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/** \brief Set DCCSW
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*/
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__STATIC_FORCEINLINE void __set_DCCSW(uint32_t value)
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{
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__set_CP(15, 0, value, 7, 10, 2);
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}
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/** \brief Set DCCISW
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*/
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__STATIC_FORCEINLINE void __set_DCCISW(uint32_t value)
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{
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|
__set_CP(15, 0, value, 7, 14, 2);
|
|
}
|
|
|
|
#endif
|